High Level Synthesis Graduate Intern
Intel - San Jose CA

Internship Category: Paid

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  • Job Description

    Intel’s Connectivity Group seeks highly qualified and highly motivated software/hardware engineering interns to work on the architectural modeling and synthesis of our next generation networking hardware.We intend to demonstrate that a software-driven progression from an executable spec of chip architecture to an automated synthesis of that same architecture into RTL definition can speed the path from innovation to high quality, production qualified silicon.

    Your contribution will be to assist a small team of network architects, test engineers, and hardware designers in making this vision a reality by integrating their designs and feedback into a well-crafted model that can be used to demonstrate quick-turn prototyping and validation of ASIC RTL.

    An ideal candidate would exhibit behavioral traits that indicate:

    • Ability to critically analyze and question English written specification documents and diagrams.
    • Strong spoken English.

    Qualifications

    You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.

    Minimun Qualifications

    Pursuing a PhD degree in Computer Science, Computer Engineering, or Electrical Engineering.

    6 months experience with:

    • Highly concurrent programming models such as communicating sequential processes, concurrent C++, Rust, Erlang, CUDA, or VHDL/Verilog.
    • Experience with and interest in Bluespec

    Preferred Qualifications

    Knowledge of Ethernet, TCP/IP networking.

    Inside this Business Group

    The Data Center Group (DCG) is at the heart of Intels transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.

    Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

    Job Description

    Intel’s Connectivity Group seeks highly qualified and highly motivated software/hardware engineering interns to work on the architectural modeling and synthesis of our next generation networking hardware.We intend to demonstrate that a software-driven progression from an executable spec of chip architecture to an automated synthesis of that same architecture into RTL definition can speed the path from innovation to high quality, production qualified silicon.

    Your contribution will be to assist a small team of network architects, test engineers, and hardware designers in making this vision a reality by integrating their designs and feedback into a well-crafted model that can be used to demonstrate quick-turn prototyping and validation of ASIC RTL.

    An ideal candidate would exhibit behavioral traits that indicate:

    • Ability to critically analyze and question English written specification documents and diagrams.
    • Strong spoken English.

    Qualifications

    You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.

    Minimun Qualifications

    Pursuing a PhD degree in Computer Science, Computer Engineering, or Electrical Engineering.

    6 months experience with:

    • Highly concurrent programming models such as communicating sequential processes, concurrent C++, Rust, Erlang, CUDA, or VHDL/Verilog.
    • Experience with and interest in Bluespec

    Preferred Qualifications

    Knowledge of Ethernet, TCP/IP networking.

    Inside this Business Group

    The Data Center Group (DCG) is at the heart of Intels transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.

    Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

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